? semiconductor components industries, llc, 2001 october, 2001 rev. 8 1 publication order number: sn74ls299/d sn74ls299 8-bit shift/storage register with 3-state outputs the sn74ls299 is an 8-bit universal shift/storage register with 3-state outputs. four modes of operation are possible: hold (store), shift left, shift right and load data. the parallel load inputs and flip-flop outputs are multiplexed to reduce the total number of package pins. separate outputs are provided for flip-flops q 0 and q 7 to allow easy cascading. a separate active low master reset is used to reset the register. ? common i/o for reduced pin count ? four operation modes: shift left, shift right, load and store ? separate shift right serial input and shift left serial input for easy cascading ? 3-state outputs for bus oriented applications ? input clamp diodes limit high-speed termination effects ? esd > 3500 volts guaranteed operating ranges symbol parameter min typ max unit v cc supply voltage 4.75 5.0 5.25 v t a operating ambient temperature range 0 25 70 c i oh output current high q 0 , q 7 0.4 ma i ol output current low q 0 , q 7 8.0 ma i oh output current high i/o 0 1/o 7 2.6 ma i ol output current low i/o 0 1/o 7 24 ma low power schottky device package shipping ordering information sn74ls299n pdip20 1440 units/box sn74ls299dw soicwide http://onsemi.com 38 units/rail pdip20 n suffix case 738 20 1 20 1 a = assembly location wl = wafer lot yy = year ww = work week sn74ls299n awlyyww marking diagrams ls299 awlyyww soic20 dw suffix case 751d 1 1 sn74ls299dwr2 soicwide 2500/tape & reel
sn74ls299 http://onsemi.com 2 connection diagram dip (top view) clock pulse (active positive-going edge) input serial data input for right shift serial data input for left shift parallel data input or parallel output (3-state) 3-state output enable (active low) inputs serial outputs asynchronous master reset (active low) input mode select inputs cp ds0 ds7 i/o n oe 1 , oe 2 q 0 , q 7 mr s 0 , s 1 0.5 u.l. 0.5 u.l. 0.5 u.l. 0.5 u.l. 65 u.l. 0.5 u.l. 10 u.l. 0.5 u.l. 1 u.l. 0.25 u.l. 0.25 u.l. 0.25 u.l. 0.25 u.l. 15 u.l. 0.25 u.l. 5 u.l. 0.25 u.l. 0.5 u.l. notes: a) 1 ttl unit load (u.l.) = 40 a high/1.6 ma low. high low (note a) loading pin names 18 17 16 15 14 13 1234 56 7 20 19 8 v cc s 0 s 1 d s7 q 7 i/o 7 i/o 3 i/o 5 i/o 1 oe 1 oe 2 i/o 6 i/o 4 i/o 2 i/o 0 q 0 910 mr gnd 12 11 cp ds 0 note: the flatpak version has the same pinouts (connection diagram) as the dual inline package. s 1 s 0 ds 0 clock q 0 mr oe 1 oe 2 d clr q c k i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 d s7 q 7 v cc = pin 20 gnd = pin 10 = pin numbers 14 1 2 6 7 3 8 4 5 9 11 12 13 15 16 17 18 19 d clr q c k d clr q c k d clr q c k d clr q c k d clr q c k d clr q c k d clr q c k logic diagram
sn74ls299 http://onsemi.com 3 function table inputs response mr s 1 s 0 oe 1 oe 2 cp ds 0 ds 7 l x x h x x x x asynchronous reset ; q 0 =q 7 = low l x x x h x x x a sync h ronous r eset; q 0 = q 7 = low i/o voltage undetermined l h h x x x x x i/o v o l tage u n d eterm i ne d l l x l l x x x asynchronous reset; q 0 = q 7 = low l x l l l x x x i/o voltage low h l h x x d x shift right; d q 0 ; q 0 q 1 ; etc. h l h l l d x shift right; d q 0 & i/o 0 ; q 0 o 1 & i/o 1 ; etc. h h l x x x d shift left; d q 7 ; q 7 q 6 ; etc. h h l l l x d shift left; d q 7 & i/o 7 ; q 7 q 6 & i/o 6 ; etc. h h h x x x x parallel load; i/o n q n h l l h x x x x hold: i/o voltage undetermined h l l x h x x x h o ld : i/o v o l tage un d eterm i ne d h l l l l x x x hold: i/o n = q n h = high voltage level l = low voltage level x = immaterial
sn74ls299 http://onsemi.com 4 dc characteristics over operating temperature range (unless otherwise specified) limits symbol parameter min typ max unit test conditions v ih input high voltage 2.0 v guaranteed input high voltage for all inputs v il input low voltage 0.8 v guaranteed input low voltage for all inputs v ik input clamp diode voltage 0.65 1.5 v v cc = min, i in = 18 ma v oh output high voltage i/o 0 i/o 7 2.4 3.1 v v cc = min, i oh = max v oh output high voltage q 0 , q 7 2.7 3.4 v v cc = min, i oh = max v ol output low volta g e 0.25 0.4 v i ol = 12 ma v cc = v cc min, v in v il or v ih v ol out ut low voltage i/o 0 i/o 7 0.35 0.5 v i ol = 24 ma v in = v il or v ih per truth table v ol output low volta g e 0.4 v i ol = 4.0 ma v cc = v cc min, v in v il or v ih v ol out ut low voltage i/o 0 i/o 7 0.5 v i ol = 8.0 ma v in = v il or v ih per truth table i ozh output off current high i/o 0 i/o 7 40 m a v cc = max, v out = 2.7 v i ozl output off current low i/o 0 i/o 7 400 m a v cc = max, v out = 0.4 v others 20 m a s 0 , s 1 , i/o 0 i/o 7 40 m a v cc = max, v in = 2.7 v i ih input high current others 0.1 ma v cc = max v in =70v s 0 , s 1 0.2 ma v cc = max, v in = 7.0 v i/o 0 i/o 7 0.1 ma v cc = max, v in = 5.5 v i il in p ut low current others 0.4 ma v cc max v in 04v i il input low current s 0 , s 1 0.8 ma v cc = max, v in = 0.4 v i os short circuit current q 0 , q 7 20 100 ma v cc = max os short circuit current (note 1.) i/o 0 i/o 7 30 130 ma v cc = max i cc power supply current 53 ma v cc = max 1. not more than one output should be shorted at a time, nor for more than 1 second.
sn74ls299 http://onsemi.com 5 ac characteristics (t a = 25 c, v cc = 5.0 v) limits symbol parameter min typ max unit test conditions f max maximum clock frequency 25 35 mhz t phl t plh propagation delay, clock to q 0 or q 7 26 22 39 33 ns c l = 15 pf t phl propagation delay, clear to q 0 or q 7 27 40 ns l t phl t plh propagation delay, clock to i/o 0 i/o 7 26 17 39 25 ns t phl propagation delay, clear to i/o 0 i/o 7 26 40 ns c l = 45 pf, r l = 667 w t pzh t pzl output enable time 13 19 21 30 ns l t phz t plz output disable time 10 10 15 15 ns c l = 5.0 pf ac setup requirements (t a = 25 c, v cc = 5.0 v) limits symbol parameter min typ max unit test conditions t w clock pulse width high 25 ns t w clock pulse width low 13 ns t w clear pulse width low 20 ns t s data setup time 20 ns v cc 50v t s select setup time 35 ns v cc = 5.0 v t h data hold time 0 ns t h select hold time 10 ns t rec recovery time 20 ns
sn74ls299 http://onsemi.com 6 1.3 v 1.3 v 1.3 v 1.3 v v in v out t plh t phl 1.3 v 1.3 v v in v out 1.3 v t plh t phl 1.3 v figure 1. figure 2. figure 3. figure 4. 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v 1.5 v v e v e v out t pzl t plz v ol 0.5 v v e v e v out t pzh t phz 0.5 v v oh 3-state waveforms ac load circuit sw2 c l * 5 k w sw1 v cc r l to output under test * includes jig and probe capacitance. switch positions closed open closed closed open closed closed closed t pzh t pzl t plz t phz sw2 sw1 symbol figure 5.
sn74ls299 http://onsemi.com 7 package dimensions n suffix plastic package case 73803 issue e notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of lead when formed parallel. 4. dimension b does not include mold flash. m l j 20 pl m b m 0.25 (0.010) t dim min max min max millimeters inches a 25.66 27.17 1.010 1.070 b 6.10 6.60 0.240 0.260 c 3.81 4.57 0.150 0.180 d 0.39 0.55 0.015 0.022 g 2.54 bsc 0.100 bsc j 0.21 0.38 0.008 0.015 k 2.80 3.55 0.110 0.140 l 7.62 bsc 0.300 bsc m 0 15 0 15 n 0.51 1.01 0.020 0.040 e 1.27 1.77 0.050 0.070 1 11 10 20 a seating plane k n f g d 20 pl t m a m 0.25 (0.010) t e b c f 1.27 bsc 0.050 bsc dw suffix plastic soic package case 751d05 issue f 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition.
sn74ls299 http://onsemi.com 8 on semiconductor and are trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may be provided in scill c data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. sn74ls299/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada
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